This invention relates to a non-volatile semiconductor memory device and, more particularly, it relates to a memory device adapted to store multi-valued data and also to a method of storing such data of the device.
NAND type flush memory devices comprising an EEPROM that is an electrically writable non-volatile, semiconductor memory have been proposed. In such a NAND type flush memory, the sources and the drains of a plurality of adjacently arranged memory cells are connected in series and the plurality of memory cells that are connected in series are connected to a bit line as a unit. Then, a set of data are collectively written in or read from all or half of the plurality of cells arranged in a row.
In recent years, multi-valued memories that can store a plurality of data (n-bit data) written into a single cell have been developed as NAND type flush memories. Such a multi-valued memory requires the use of n latch circuits for writing data to or reading data from a single cell in order to write a plurality of data to or reading a plurality of data from the single cell because the threshold value of the cell is determined by the contents of the data latched by the latch circuits.
However, as the number of data n that can be stored in a single cell increases, the number of latch circuits that is equal to n also increases to make them occupy the chip that contains them to a large extent.
Meanwhile, when storing data in a cell, an operation is conducted to verify that the threshold value of the cell properly corresponds to the written data. The number of verifying operations increases as the number of data to be written to a cell. Then, the time required for data writing and write-verifying operations increases for each cell.